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Silicon Labs /Series0 /EZR32HG /EZR32HG320F32R61 /PRS /TRACECTRL

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Interpret as TRACECTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TSTARTEN)TSTARTEN 0 (PRSCH0)TSTART 0 (TSTOPEN)TSTOPEN 0 (PRSCH0)TSTOP

TSTOP=PRSCH0, TSTART=PRSCH0

Description

MTB Trace Control Register

Fields

TSTARTEN

PRS TSTART Enable
TSTART

MTB TSTART PRS select

0 (PRSCH0): PRS ch 0 is controlling TSTART.

1 (PRSCH1): PRS ch 1 is controlling TSTART.

2 (PRSCH2): PRS ch 2 is controlling TSTART.

3 (PRSCH3): PRS ch 3 is controlling TSTART.

4 (PRSCH4): PRS ch 4 is controlling TSTART.

5 (PRSCH5): PRS ch 5 is controlling TSTART.
TSTOPEN

PRS TSTOP Enable
TSTOP

MTB TSTOP PRS select

0 (PRSCH0): PRS ch 0 is controlling TSTOP.

1 (PRSCH1): PRS ch 1 is controlling TSTOP.

2 (PRSCH2): PRS ch 2 is controlling TSTOP.

3 (PRSCH3): PRS ch 3 is controlling TSTOP.

4 (PRSCH4): PRS ch 4 is controlling TSTOP.

5 (PRSCH5): PRS ch 5 is controlling TSTOP.

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data